1. Field of the Disclosure
The present disclosure relates to a semiconductor apparatus.
2. Description of the Related Art
A heterojunction bipolar transistor (HBT) is used for a power amplifier module of, for example, a mobile terminal. In the semiconductor apparatus disclosed in Japanese Unexamined Patent Application Publication No. 2003-77930, a bump is disposed immediately above an HBT. The bump is electrically connected to the HBT via a cavity formed in an insulating film disposed between the HBT and the bump. The entirety of the HBT is disposed within the cavity. With this configuration, the distance from the HBT to the bump is decreased, thereby reducing the thermal resistance in a heat path from the HBT to the bump.
This configuration, however, is likely to produce the thermal stress in the emitter layer of the HBT due to the difference between the coefficient of thermal expansion of the emitter layer and that of the bump. The occurrence of the thermal stress decreases the reliability of the HBT.
Japanese Patent No. 5967317 discloses a semiconductor apparatus that can reduce the thermal stress. In this semiconductor apparatus, the emitter layer of an HBT is formed in a substantially rectangular shape as viewed from above. A cavity formed in an insulating film under a bump is disposed at a position displaced from the emitter layer of the HBT in its longitudinal direction. This configuration makes it possible to reduce the thermal stress produced in the emitter layer to be lower than in the configuration in which the entirety of the emitter layer is disposed within the cavity.